1. Field of the Invention
The present invention relates to a semiconductor device and the process of fabricating such a device, and more particularly to a semiconductor device having its gate oxide films differ from each other in film thickness and formed on a same semiconductor substrate, and a process of fabrication thereof.
2. Description of the Related Art
It is required to increase a degree of integration of system LSIs and like circuits in the art, wherein these circuits have a plurality of functions and are formed on a same semiconductor substrate. In a semiconductor device thus formed, a plurality of voltage levels are often used. In such a case, a plurality of gate insulation films varying in film thickness are formed on the same semiconductor substrate, wherein a thickness of each of the gate insulation films is dependent on each of the voltage levels used therein. One of conventional semiconductor devices of this type is disclosed in Japanese Laid-open Patent No. Hei 10-223774.
Now, with reference to sectional views shown in FIGS. 6A to 6E, a conventional process of fabricating such conventional semiconductor device will be described, wherein the conventional semiconductor device is provided with a plurality of gate insulation films which are different from each other in film thickness.
In this conventional process of fabricating the conventional semiconductor device, first, as shown in FIG. 6A, a field insulation film 2 is formed on a device isolation region (hereinafter may also be referred to as an ISO region) of an upper surface of a semiconductor substrate 1 by using a LOCOS (Local Oxidation of Silicon) process which is well known in the art. As a result, a plurality of device forming regions (ACTA and ACTB regions) are separated from each other and defined as individual device forming regions by such formation of the field insulation film 2.
Then, as shown in FIG. 6B, a plurality of gate insulation films 3 are formed on the surface of the semiconductor substrate 1 having been exposed in these device forming regions. Subsequent to the above, a resist film 4 is formed to cover all the field insulation film 2 and the gate insulation films 3.
After that, as shown in FIG. 6C, the resist film 4 is patterned by photolithography and etching: to form an opening portion 5 of the resist film 4 in a position corresponding to that of the device forming region (ACTB region) in which a second gate insulation film 6 thin in film thickness should be formed; and, to cover the other device forming region (ACTA region) in which a first gate insulation film 3a thick in film thickness is formed. Then, the gate insulation film 3 thus exposed through the opening portion 5 of the resist film 4 is removed by wet-etching with the use of the thus patterned resist film 4 as a mask.
Subsequent to the above, as shown in FIG. 6D, all the resist film 4 is removed. After that, the surface of the semiconductor substrate 1 is subjected to a thermal oxidation process in positions corresponding to those of the device forming regions ACTA and ACTB, and thereby: additionally forming the second gate insulation film 6 in the surface of the semiconductor substrate 1 in the positions corresponding to those of the ACTB regions; and, increasing the gate insulation film 3 in film thickness due to addition of a newly oxidized portion of the surface of the semiconductor substrate 1 thereto to form the first gate insulation film 3a thick in film thickness in the positions corresponding to those of the ACTA regions.
Now, as shown in FIG. 6E, a polysilicon film is formed and patterned over an entire surface of the semiconductor substrate 1, so that a plurality of the gate electrodes 7 is formed. Then, the first gate insulation film 3a and the second gate insulation film 6 are selectively removed by etching with the use of the gate electrodes 7 as masks, so that only those of the first gate insulation film 3a and the second gate insulation film 6 having been covered by the gate electrodes 7 remain unremoved to form a first gate insulation film 3b and a second gate insulation film 6a, respectively.
Subsequent to the above, drain/source region, S/D regions 8a, 8b, are formed in the exposed surface of the semiconductor substrate 1 in positions adjacent to opposite sides of each of the gate electrodes 7 by ion implantation of a conductive impurity into the surface of the semiconductor substrate 1 with the use of the gate electrode 7 as a mask.
The above ion implantation process is followed by well-known conventional process steps, so that the conventional semiconductor device having its first and its second gate insulation film 3b, 6a differ from each other in film thickness is completed in fabrication.
Now, a problem to be solved by the present invention will be described.
In the above-mentioned conventional process of fabricating the semiconductor device, however, there is a danger that a so-called xe2x80x9cteardrop (xe2x80x9cMizutamaxe2x80x9d in Japanese language)xe2x80x9d defect appears in each of the surface of the gate insulation film 3 and the surface of the semiconductor substrate 1, in which defect the additional first gate insulation film 3a and the second gate insulation film 6 additionally formed are not formed in the gate insulation film 3 and the surface of the semiconductor substrate 1, respectively, during the process step shown in FIG. 6D.
In view of the above, it is an object of the present invention to provide a semiconductor device and a process of fabricating such a device, wherein: the semiconductor device has its gate insulation films differ from each other in film thickness; and, the process of fabrication of the device is capable of preventing each of a surface of a semiconductor substrate of the device and a surface of each of the gate insulation films of the device from being contaminated, and therefore capable of normally forming a new gate insulation film on each of the surface of the previous gate insulation film and the surface of the semiconductor substrate.
According to a first aspect of the present invention, there is provided a process of fabricating a semiconductor device provided with a plurality of gate insulation films varying in film thickness, wherein the gate insulation films are formed on the same semiconductor substrate, the process of fabricating a semiconductor device including the steps of:
selectively forming a device isolation region on a surface of the semiconductor substrate to form a plurality of device forming regions which are separated from each other through the device isolation region;
forming the first gate insulation film in each of the device forming regions on a surface of a semiconductor substrate;
forming a protection film made of an inorganic material on the first gate insulation film, wherein the inorganic material is resistant to an etching action exerted on the first gate insulation film;
forming a first photosensitive etching-resistance film on the protection film, wherein the first photosensitive etching-resistance film is resistant to an etching action exerted on the protection film;
patterning the first photosensitive etching-resistance film to form an opening portion of the first photosensitive etching-resistance film in a predetermined one of the device forming regions;
etching the protection film through the opening portion of the first photosensitive etching-resistance film to have the first gate insulation film exposed in the predetermined one of the device forming regions;
removing the thus exposed first gate insulation film by using the protection film as a mask so that the surface of the semiconductor substrate is exposed; and
forming the second gate insulation film on the thus exposed surface of the semiconductor substrate.
In the foregoing, a preferable mode is one wherein the second gate insulation film is formed in a condition in which a protection film is not removed.
Also, a preferable mode is one wherein the step of forming the second gate insulation film is followed by the steps of:
patterning the protection film thus remaining unremoved on the first gate insulation film to form a first gate electrode;
forming a second photosensitive etching-resistance film over the entire surface of the semiconductor substrate;
patterning the second photosensitive etching-resistance film to form an opening portion of the second photosensitive etching-resistance film on the second gate insulation film;
forming a conductive film over the entire surface of the semiconductor substrate to form a second gate electrode on the second gate insulation film defined by the opening portion of the second photosensitive etching-resistance film, wherein the second gate electrode is formed of the conductive film; and
removing the conductive film together with the second photosensitive etching-resistance film by removing the second photosensitive etching-resistance film through a lift-off process in a condition in which the second gate electrode remains unremoved.
Further, a preferable mode is one wherein the step of forming the second gate insulation film is followed by the steps of:
forming a third photosensitive etching-resistance film over the entire surface of the semiconductor substrate;
patterning the third photosensitive etching-resistance film to form an opening portion of the third photosensitive etching-resistance film on the second gate insulation film;
forming a conductive film over the entire surface of the semiconductor substrate to form a second gate electrode on the second gate insulation film defined by the opening portion of the third photosensitive etching-resistance film, wherein the second gate electrode is formed of the conductive film;
removing the conductive film together with the third photosensitive etching-resistance film by removing the third photosensitive etching-resistance film through a lift-off process in a condition in which the second gate electrode remains unremoved;
forming a fourth photosensitive etching-resistance film over the entire surface of the semiconductor substrate;
patterning the fourth photosensitive etching-resistance film to form a first and a second pattern of the fourth photosensitive etching-resistance film, wherein the first pattern covers the device forming regions in which the second gate electrodes have been formed, and the second pattern is formed in the device forming regions in which the first gate electrodes should be formed on the protection film; and
etching the protection film by using the second pattern of the fourth photosensitive etching-resistance film as a mask to form the first gate electrode in each of the device forming regions.
Also, a preferable mode is one wherein the step of forming the second gate insulation film is followed by the steps of:
removing the protection film;
forming a conductive film to cover both the first gate insulation film and the second gate insulation film; and
patterning the conductive film to form a first gate electrode and a second gate insulation film on the first gate insulation film and the second gate insulation film, respectively.
Further, a preferable mode is one wherein the protection film is formed of a semiconductor film.
Still further, a preferable mode is one wherein each of the first, the second, the third and the fourth photosensitive etching-resistance film forms a resist film.
According to a second aspect of the present invention, there is provided a semiconductor device fabricated by a process of fabricating a semiconductor device provided with a plurality of gate insulation films varying in film thickness, wherein the gate insulation films are formed on the same semiconductor substrate, the process including the steps of:
selectively forming a device isolation region on a surface of the semiconductor substrate to form a plurality of device forming regions which are separated from each other through the device isolation region;
forming a first gate insulation film in each of the device forming regions on the surface of the semiconductor substrate;
forming a protection film made of an inorganic material on the first gate insulation film, wherein the inorganic material is resistant to an etching action exerted on the first gate insulation film;
forming a first photosensitive etching-resistance film on the protection film, wherein the first photosensitive etching-resistance film is resistant to an etching action exerted on the protection film;
patterning the first photosensitive etching-resistance film to form an opening portion of the first photosensitive etching-resistance film in a predetermined one of the device forming regions;
etching the protection film through the opening portion of the first photosensitive etching-resistance film to have the first gate insulation film exposed in the predetermined one of the device forming regions;
removing the thus exposed first gate insulation film by using the protection film as a mask so that the surface of the semiconductor substrate is exposed; and
forming a second gate insulation film on the thus exposed surface of the semiconductor substrate.
Action of the present invention having an above configuration is as follows, namely:
First, with respect to a problem inherent in the conventional process of fabricating a semiconductor device shown in FIGS. 6A and 6B, the inventor of the present invention has found that the gist of the problem resides in the fact that a residue of the resist film used in a patterning process remains unremoved on a surface of a gate insulation film due to such resist film""s immediate contact with the gate insulation film 3, wherein the residue is produced when: an opening portion is formed in the resist film; the gate insulation film is wet-etched; and, the resist film is removed.
In view of this finding, the present invention having the above process construction was made. Consequently, in the present invention, the first photosensitive etching-resistance film such as the resist film is not directly formed on the first gate insulation film which is formed first on the surface of the semiconductor substrate. More specifically, in the present invention, the protection film made of an inorganic material is interposed between the first gate insulation film and the resist film. Due to this construction, in the present invention, at a time after the first gate insulation film is formed and before the second gate insulation film is formed, there is no danger that the photosensitive etching-resistance film is brought into immediate contact with each of the surface of the first gate insulation film and the surface of the semiconductor substrate in which the second gate insulation film should be formed. Consequently, the process of the present invention is capable of preventing such surface of each of the first gate insulation film and the semiconductor substrate (in which the second gate insulation film should be formed) from being contaminated with the residue of the resist film (photosensitive etching-resistance film). This makes it possible for the process of the present invention to normally form the second gate insulation film on the surface of the semiconductor substrate.
Further, in the present invention having the above construction, a conductive film is used as such a protection film, which makes it possible to use the conductive film directly as a gate electrode after completion of patterning of the conductive film. Consequently, it is possible for the process of the present invention to have the first and the second gate insulation film not subjected to a dry etching process which is performed to remove the protection film. This makes it possible to prevent the first and the second gate insulation film from being reduced in film thickness and from being damaged in surface quality.